Thank you for using PTM! This model is developed by the Nanoscale Integration and Modeling (NIMO) Group at ASU. It is sponsored by MARCO  Focus Center for Circuit and System Solutions (C2S2) and Materials Structures and Devices Center (MSD), and by Semiconductor Research Corporation (SRC). If you have any comments, welcome to contact us:

  • Research Group:

          Professor: Yu (Kevin) Cao,

          Students:  PTM for Nano-CMOS: Wei Zhao,; Eric Wang,;

                          Reliability modeling: Wenping Wang,; Jyothi Velamala,

                          PTM for CNT-FET: Asha Balijepalli,; Saurabh Sinha,

                          PTM for multi-gate devices: Saurabh Sinha,


  • Mail:        School of ECEE, PO Box 875706, ASU, Tempe, AZ 85287-5706

  • Phone:     (480) 9651472

  • FAX:       (480) 9650616

Last updated 06/01/2012. Questions? Contact us.

Copyright 2005, Nanoscale Integration and Modeling (NIMO) Group, ASU. All rights reserved.